Introducing HardCloud

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Joined: Fri Apr 27, 2018 3:07 am

Introducing HardCloud

Post by ciroceissler »


We are excited to announce the first release of the open-source project HardCloud (

HardCloud is an extension to the OpenMP 4.X standard that seeks to ease the task of offloading IP-cores to FPGA accelerators in CPU-FPGA architectures. This is achieved by two new clauses [use] and [module] shown in the example below:

Code: Select all

#pragma omp target device(HARP | HARPSIM | Catapult) map(to: X) map(from: Y)
#pragma omp parallel for use(hrw) module(loopback) check

for(int i = 0; i < n; i++) {
    Y[i] = X[i];
Clause use(hrw) allows the computation to be performed by a pre-synthesized hardware module (loopback) instead of by the C code following the annotation. A new optional [check] clause is under development to enable the automatic co-verification of the loopback output, i.e., Y, against the regular software execution.

A new OpenMP 4.X libomptarget plugin was added to the Clang/LLVM compiler that leverages on the Intel OPAE library to build a seamless programming interface.

HardCloud currently enables HARP and HARPSIM device plugins that are respectively associated with the Intel HARP2 architecture and its simulator. Design of the Microsoft Catapult plugin is underway.

HardCloud adds two new IP-blocks to the basic Intel HARP2 blocks. They allow the user's IP-core to perform streaming and indexed buffer accesses. This is done through a simple IP-core HDL interface.

At you can find a docker distribution, tutorials, presentations and a Wiki that could be useful in case you want to give HardCloud a try.

Your feedback would be highly appreciated!!


Ciro Ceissler

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