Help with declare variant

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Help with declare variant

Postby fpetrogalli-arm » Fri Mar 22, 2019 12:38 pm

Hi all,

I have been reading the specs for `declare variant` in OpenMP 5.0 and I have a couple of questions:

1. I understand that `simdlen(n)` is always required when using `declare variant` in the context of a `simd` construct. If that's the case, I wonder whether it would be possible to accept a `simdlen(0)` to represent Vector Length Agnostic (VLA) signatures like those that can be generated for vector ISA like the Scalable Vector Extension (SVE) for Arm. The Vector Function ABI for AArch64 handles such undefined simdlen (see [1]), and I am trying to find a way to make this work for these cases. If using `simdlen(0)` is not possible, would this situation one of the use cases for introducing the `extension(extension-name-list)` trait of the `implementation` set? (see page 52 of the specs).

2. What is the difference between the `isa` and `arch` traits of the `device` set? If I think in term or Arm achitectures, I would think armv7 and armv8 to be `isa`s, but then it is not clear what an `arch` would be. Would that be a micro-architectural implementation (for example a `Cortex` product)? Or is the `isa` use to specify the vector extension only? Something like `isa([sve|neon|avx512|sse])`? Or is my question ill defined just because the specs state that these values are implementation defined and therefore any vendor can write in `isa` and `arch` whatever they want?

3. Last but not least. I understand that `declare variant` directive requires to specify the function declaration id. For example, a variant of a C99 `sin` function would be marked as following in a simd context (neon example):

Code: Select all
#pragma omp declare variant(double sin(double)) match (construct=simd(simdlen(2), notinbranch) /*other optional context matching directives */)
float64x2_t neon_vector_sin(float64x2_t in) {
// ... code
}


Does this directive require the original `sin` declaration to be marked as `declare simd` to be effective, or is the declare variant implying the correspondent `declare simd simdlen(2) notinbranch` to the declaration of `sin`? If the latter, does it mean that the user doesn't have to mark the `sin` with `declare simd` to achieve auto-vectorization of the loops that invoke `sin`? [2]

Thank you for your help.

Francesco

[1] Vector Function ABI for AArch64, see https://developer.arm.com/products/soft ... nction-abi, section 3.4.1, and name mangling function in section 3.5
[2] Of course, if `simdlen(2) notinbranch` is compatible with the auto-vectorization process for the loop.
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Re: Help with declare variant

Postby fpetrogalli-arm » Fri May 10, 2019 6:33 am

Hi all,

Arm just released a version of the Vector Function ABI specifications for AArch64 that uses the `declare variant` directive from OpenMP 5.0 to support user defined vector functions. The mechanism is introduced in chapter 4, and it is in beta release status to allow feedback from the OpenMP community. Feedback needs to be provided at arm.eabi (at) arm.com by end of June 16th (AOE).

The document can be retrieved at https://developer.arm.com/tools-and-sof ... nction-abi

Kind regards,

Francesco
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